See what our customers are saying about Zeni EDA tools.
I used Cadence dfII tools for over 10 years and like them. I even liked the support that I've had over the years, but I chose to go with the Zeni tools at my new company. Primarily, it came down to lower cost for similar functionality and the ability to work with the same data.
1. Similarity to Cadence: Since most custom IC designers use the Cadence dfII environment, using Cadence or an environment similar to Cadence will allow new designers and consultants to come up to speed quickly. Anyone familiar with Cadence will understand how to use Zeni instantly. Even the default bindkeys and option forms (f3 button for example) are similar.
2. Virtuoso/Dracula/Calibre lib compatability: Most foundries support Cadence Virtuoso (creation) and Dracula/Calibre's DRC/LVS. Zeni does a good job working or converting these files. EDIF from Cadence worked flawlessly.
3. Functionality/bugs: For an analog designer, Zeni works well. I have no idea how Zeni handles huge capacity, but the tools work just great for our applications (<10K transistors).
4. Roadmap: Zeni is very responsive to bug fixes and feature requests. Most of my requests are put into the tool within 3 months. They just don't say it, they do it. They intend to stay compatible with dfII and Open Access. Makes it a low cost industry compliant tool.
-- Cliff Wiener of Proteus
We are just starting to use Zeni now, so, we are still very green!! As a small company (our IC group just grew by 100% from 1 designer to 2!!!), we were looking for an IC design tool that was a good middle-of-the-road compromise between the 'low-end' tools (cheap but imited), and the 'high-end' tools (can do everything but obscenely expensive) and came to the conclusion that Zeni was the best bang for the $$$ out there. Some of the key points:
1. Open architecture (similar to Cadence) - you are not 'stuck' - you can add capability by interfacing with other tools, simulators, etc.
2. Front to back integration with a 'design manager'.
3. Good verification tools (DRC/LVS) and LVS debugging tools. Can import Dracula decks with minimal changes.
4. 2.5-D parasitic extraction capability - seems to work well.
Now, we just need to use their system for a while.
-- Patrick Mawet of Micro Encoder
We looked at Silvaco, Tanner, Mentor, Cadence and Zeni.
1. Cadence wrote themselves out of the picture with a quote which they claimed was stripped down to bare bones, but Cadence was still 5X what we were willing to spend.
2. Mentor prepared a very interesting quote but was still above the amount of money we had. (We are funded through consulting and grants.)
3. Silvaco had a reasonably complete set and we had some interest in the device parameter extraction tool also, but there is always the Ivan issue. (Who's he going to sue today - us?) Also, for the kind of money we were talking about, we would only get full access to the cheap tools, and for the more expensive pieces like the parasitic extraction we would have to rent by the hour.
4. Tanner put together a complete quote including some prefabricated design blocks. However we learned that these had not in fact been silicon tested so we weren't sure how much value they added. The parasitic extraction capabilities seemed extremely limited also - capacitance is only vertical area based, no fringe terms, no wire to wire extraction.
I talked to one of their testimonial people, but he had only used the layout tool, none of the rest of the suite. That didn't seem like a whole-hearted endorsement. Another testimonial user said the tools were good for small components but was dubious about whether the tools would scale to a large design. We are aiming at a large chip, so a non-scalable tool didn't seem like a good match.
For Zeni, we got a ringing endorsement from a trusted previous user. (I don't want to give his name since I feel like we already imposed by calling him up and chatting with him on a Friday night.) In addition, our own kicking the tires felt pretty good. We read in a large GDS file and it didn't choke. Poking around under the hood showed that the parameterizable cells are all written in TCL and there is a lot of programability.
The Zeni parasitic extractor is quite sophisticated according to the documentation at least - it does field solver accuracy on sample cross sections and then uses pattern matching to extract the parasitics of the entire design. The tool is also Unix based which gave us a higher comfort level in terms of being able to go in and fix whatever we needed with awk, perl etc. Finally, the design kits for the foundry technologies we needed were all ready to go.
Overall, we got a sense of solid engineering in the Zeni tool. Whether this is borne out by experience, only time will tell.
We are just installing the Zeni tools as we speak.
NTU as a world-class University in Singapore has been in the areas of IC Design for years and have all the big EDA companies tools like Mentor, Cadence, Synopsys and Zeni.
But for Zeni, since 2003 we have use it for the full-time IC Design Classes for the undergraduate course for the Degree in EEE. The complete Full-custom IC Design Flow allows students to fully go through a IC Design steps from Circuits Design on paper to Layout and finally to prepare the Design for fabrication.
Zeni Tool Suites has a very user-friendly interface which allows students to start using the IC tools without much effort. The tool is very much intergrated to provide a full-IC design flow since Z4 and we like it. Overall, the suites provide a strong basic startup tool for IC Design.
Currently, we have 125 licenses Full suites of Zeni tools used for the courses and the research programs activites in NTU.
-- NTU
I used Cadence dfII tools for over 10 years and like them. I even liked the support that I've had over the years, but I chose to go with the Zeni tools at my new company. Primarily, it came down to lower cost for similar functionality and the ability to work with the same data.
1. Similarity to Cadence: Since most custom IC designers use the Cadence dfII environment, using Cadence or an environment similar to Cadence will allow new designers and consultants to come up to speed quickly. Anyone familiar with Cadence will understand how to use Zeni instantly. Even the default bindkeys and option forms (f3 button for example) are similar.
2. Virtuoso/Dracula/Calibre lib compatability: Most foundries support Cadence Virtuoso (creation) and Dracula/Calibre's DRC/LVS. Zeni does a good job working or converting these files. EDIF from Cadence worked flawlessly.
3. Functionality/bugs: For an analog designer, Zeni works well. I have no idea how Zeni handles huge capacity, but the tools work just great for our applications (<10K transistors).
4. Roadmap: Zeni is very responsive to bug fixes and feature requests. Most of my requests are put into the tool within 3 months. They just don't say it, they do it. They intend to stay compatible with dfII and Open Access. Makes it a low cost industry compliant tool.
-- Cliff Wiener of Proteus
We are just starting to use Zeni now, so, we are still very green!! As a small company (our IC group just grew by 100% from 1 designer to 2!!!), we were looking for an IC design tool that was a good middle-of-the-road compromise between the 'low-end' tools (cheap but imited), and the 'high-end' tools (can do everything but obscenely expensive) and came to the conclusion that Zeni was the best bang for the $$$ out there. Some of the key points:
1. Open architecture (similar to Cadence) - you are not 'stuck' - you can add capability by interfacing with other tools, simulators, etc.
2. Front to back integration with a 'design manager'.
3. Good verification tools (DRC/LVS) and LVS debugging tools. Can import Dracula decks with minimal changes.
4. 2.5-D parasitic extraction capability - seems to work well.
Now, we just need to use their system for a while.
-- Patrick Mawet of Micro Encoder
We looked at Silvaco, Tanner, Mentor, Cadence and Zeni.
1. Cadence wrote themselves out of the picture with a quote which they claimed was stripped down to bare bones, but Cadence was still 5X what we were willing to spend.
2. Mentor prepared a very interesting quote but was still above the amount of money we had. (We are funded through consulting and grants.)
3. Silvaco had a reasonably complete set and we had some interest in the device parameter extraction tool also, but there is always the Ivan issue. (Who's he going to sue today - us?) Also, for the kind of money we were talking about, we would only get full access to the cheap tools, and for the more expensive pieces like the parasitic extraction we would have to rent by the hour.
4. Tanner put together a complete quote including some prefabricated design blocks. However we learned that these had not in fact been silicon tested so we weren't sure how much value they added. The parasitic extraction capabilities seemed extremely limited also - capacitance is only vertical area based, no fringe terms, no wire to wire extraction.
I talked to one of their testimonial people, but he had only used the layout tool, none of the rest of the suite. That didn't seem like a whole-hearted endorsement. Another testimonial user said the tools were good for small components but was dubious about whether the tools would scale to a large design. We are aiming at a large chip, so a non-scalable tool didn't seem like a good match.
For Zeni, we got a ringing endorsement from a trusted previous user. (I don't want to give his name since I feel like we already imposed by calling him up and chatting with him on a Friday night.) In addition, our own kicking the tires felt pretty good. We read in a large GDS file and it didn't choke. Poking around under the hood showed that the parameterizable cells are all written in TCL and there is a lot of programability.
The Zeni parasitic extractor is quite sophisticated according to the documentation at least - it does field solver accuracy on sample cross sections and then uses pattern matching to extract the parasitics of the entire design. The tool is also Unix based which gave us a higher comfort level in terms of being able to go in and fix whatever we needed with awk, perl etc. Finally, the design kits for the foundry technologies we needed were all ready to go.
Overall, we got a sense of solid engineering in the Zeni tool. Whether this is borne out by experience, only time will tell.
We are just installing the Zeni tools as we speak.
NTU as a world-class University in Singapore has been in the areas of IC Design for years and have all the big EDA companies tools like Mentor, Cadence, Synopsys and Zeni.
But for Zeni, since 2003 we have use it for the full-time IC Design Classes for the undergraduate course for the Degree in EEE. The complete Full-custom IC Design Flow allows students to fully go through a IC Design steps from Circuits Design on paper to Layout and finally to prepare the Design for fabrication.
Zeni Tool Suites has a very user-friendly interface which allows students to start using the IC tools without much effort. The tool is very much intergrated to provide a full-IC design flow since Z4 and we like it. Overall, the suites provide a strong basic startup tool for IC Design.
Currently, we have 125 licenses Full suites of Zeni tools used for the courses and the research programs activites in NTU.
-- NTU
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